VerilogEditor

VerilogEditor icon

VerilogEditor

AIP Technology Corporation, Taiwan Branch

AppRecs review analysis

AppRecs rating 3.0. Trustworthiness 65 out of 100. Review manipulation risk 30 out of 100. Based on a review sample analyzed.

★★★☆☆

3.0

AppRecs Rating

Ratings breakdown

5 star

0%

4 star

100%

3 star

0%

2 star

0%

1 star

0%

About VerilogEditor

This application provides an intuitive graphical user interface (GUI) that allows users to quickly generate Verilog code for digital circuit design. In addition to code generation, the app also supports browsing VCD (Value Change Dump) data, making it easier to inspect and analyze simulation results.

Contact us: marslee@aipesd.com
Terms of Use: https://www.apple.com/legal/internet-services/itunes/dev/stdeula/
Privacy Policy: https://www.aipesd.com/en/%E9%9A%B1%E7%A7%81%E6%AC%8A%E8%81%B2%E6%98%8E/

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Reviews for VerilogEditor

rickroller314

Buggy display

When renaming subcircuits, the title is white text on a white background. Also, the UI is generally unintuitive - I can connect gates to each other, but I can't see any way to connect the output or input pins. Edit: if you tap unconnected nodes you can edit the name. Change the name to match the IO port names, which you can edit in the upper left. Still getting some kind of error though, although the only indication is that a portion of the thumbnail is red for the circuit I'm working on. Needs a tutorial Edit 2: I'd be delighted to take you up on that! Could you tell me the address to email?

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